TPS65192 datasheet(13/25 Pages) TI

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LEVEL SHIFTERS WITHOUT GATE VOLTAGE SHAPING

Channel

Control

VGH1

OUTx ToLCDPanel

VGL

INx

FromTiming

Controller

PANEL DISCHARGE

R EF

= R

1.5 V

(2)

TPS65192

www.ti.com ....................................................................................................................................................................................................... SLVS962 – JULY 2009

Channels 7 through 9 do not support gate voltage shaping and are controlled only by the logic level applied to

their INX pin. Figure 23 contains a block diagram of a channel that does not support gate voltage shaping.

Figure 23. Block Diagram of Level Shifter Without Gate Voltage Shaping

The TPS65192 contains a function for discharging the display panel during power-down. The discharge function

comprises a comparator and a level shifter (see Figure 24). During normal operation, the voltage applied to the

VSENSE pin is greater than VREF, the output of the level shifter is low, and the DISCHARGE signal is at VGL.

During power-down, when the voltage applied to the VSENSE pin falls below VREF, the level shifter output goes

high and the DISCHARGE signal tracks VGH1 as it discharges (see Figure 16 and Figure 17). Note that gate

voltage shaping is disabled when the voltage applied to the VSENSE pin is less than VREF.

Figure 24. Panel Discharge Function Block Diagram

Suitable values for resistors R1 and R2 in Figure 24 can be calculated as follows:

Where Vx is the voltage used to activate/deactivate the discharge function.

For most applications, a value between 1k

Ω and 10kΩ for R2 can be used (R1 depends on the value of R2 and

the value of Vx).

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