PIN CONFIGURATIONS

(1)(2)

V

S-

BIAS-1/D1D2

BIAS-2/D1D2

D1IN+

D2IN+

GND

(3)

I

ADJ

D3IN+

D4IN+

BIAS-2/D3D4

BIAS-1/D3D4

V

S-

V

S+

D1OUT

D1FB

D2FB

D2OUT

NC

(4)

NC

(4)

D3OUT

D3FB

D4FB

D4OUT

V

S+

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

PowerPAD

(1)

D1IN+

D2IN+

GND

(3)

I

ADJ

NC

(4)

D3IN+

D2FB

D2OUT

NC

(4)

D3OUT

D3FB

D4FB

1

2

3

4

5

6

18

17

16

15

14

13

PowerPAD

(1)

19

D4IN+

D1FB

7

THS6214

QFN-24

HTSSOP-24

RHF PACKAGE

PWP PACKAGE

(TOP VIEW)

(TOP VIEW)

(1)

The PowerPAD is electrically isolated from all other pins and can be connected to any potential voltage range from

largest and is able to dissipate the most amount of heat.

(2)

The THS6214 defaults to the shutdown (disable) state if no signal is present on the bias pins.

(3)

(4)

NC = no connection.

Copyright © 2009, Texas Instruments Incorporated

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