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TPS2202AI датащи(PDF) 15 Page - Texas Instruments |
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TPS2202AI датащи(HTML) 15 Page - Texas Instruments |
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15 / 23 page ![]() TPS2202AI DUAL-SLOT PC CARD POWER-INTERFACE SWITCH WITH RESET FOR SERIAL PCMCIA CONTROLLER SLVS123A – SEPTEMBER 1995 – REVISED JUNE 1998 15 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 APPLICATION INFORMATION voltage transitioning requirement PC Cards, like portables, are migrating from 5 V to 3.3 V to minimize power consumption, optimize board space, and increase logic speeds. The TPS2202AI is designed to meet all combinations of power delivery as currently defined in the PCMCIA standard. The latest protocol accommodates mixed 3.3-V/5-V systems by first powering the card with 5 V, then polling it to determine its 3.3-V compatibility. The PCMCIA specification requires that the capacitors on 3.3-V-compatible cards be discharged to below 0.8 V before applying 3.3-V power. This ensures that sensitive 3.3-V circuitry is not subjected to any residual 5-V charge and functions as a power reset. The TPS2202AI offers a selectable VCC and Vpp ground state, in accordance with PCMCIA 3.3-V/5-V switching specifications, to fully discharge the card capacitors while switching between VCC voltages. output ground switches Several PCMCIA power-distribution switches on the market do not have an active-grounding FET switch. These devices do not meet the PC Card specification requiring a discharge of VCC within 100 ms. PC Card resistance can not be relied on to provide a discharge path for voltages stored on PC Card capacitance because of possible high-impedance isolation by power-management schemes. A method commonly shown to alleviate this problem is to add to the switch output an external 100 k Ω resistor in parallel with the PC Card. Considering that this is the only discharge path to ground, a timing analysis will reveal that the RC time constant delays the required discharge time to more than 2 seconds. The only way to ensure timing compatibility with PC Card standards is to use a power-distribution switch that has an internal ground switch, like that of the TPS22xx family, or add an external ground FET to each of the output lines with the control logic necessary to select it. In summary, the TPS2202AI is a complete single-chip dual-slot PC Card power interface. It meets all currently defined PCMCIA specifications for power delivery in 5-V, 3.3-V, and mixed systems, and offers a serial controller interface. The TPS2202AI offers functionality, power savings, overcurrent and thermal protection, and fault reporting in one 30-pin SSOP surface-mount package for maximum value added to new portable designs. power supply considerations The TPS2202AI has multiple pins for each of its 3.3-V, 5-V, and 12-V power inputs and for the switched VCC outputs. Any individual pin can conduct the rated input or output current. Unless all pins are connected in parallel, the series resistance is significantly higher than that specified, resulting in increased voltage drops and lost power. Both 12-V inputs must be connected for proper Vpp switching; it is recommended that all input and output power pins be paralleled for optimum operation. The VDD input lead must be connected to the 5-V input leads. Although the TPS2202AI is fairly immune to power input fluctuations and noise, it is generally considered good design practice to bypass power supplies typically with a 1- µF electrolytic or tantalum capacitor paralleled by a 0.047- µF to 0.1-µF ceramic capacitor. It is strongly recommended that the switched VCC and Vpp outputs be bypassed with a 0.1- µF or larger capacitor; doing so improves the immunity of the TPS2202AI to electrostatic discharge (ESD). Care should be taken to minimize the inductance of PCB traces between the TPS2202AI and the load. High switching currents can produce large negative-voltage transients, which forward biases substrate diodes, resulting in unpredictable performance. The TPS2202AI, unlike other PC Card power-interface switches, does not use the 12-V power supply for switching or other chip functions. Instead, an internal charge pump generates the necessary voltage from VDD, allowing the 12-V input supply to be shut down except when the Vpp programming or erase voltage is needed. Careful system design using this feature reduces power consumption and extends battery lifetime. The 3.3-V power input should not be taken higher than the 5-V input. Though doing so is nondestructive, this results in high current flow into the device and could result in abnormal operation. In any case, this occurrence indicates a malfunction of one input voltage or both which should be investigated. Similarly, no pin should be taken below – 0.3 V; forward biasing the parasitic-substrate diode results in substrate currents and unpredictable performance. |
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