TPS2202AI

DUAL-SLOT PC CARD POWER-INTERFACE SWITCH

WITH RESET FOR SERIAL PCMCIA CONTROLLER

SLVS123A – SEPTEMBER 1995 – REVISED JUNE 1998

4

POST OFFICE BOX 655303

POST OFFICE BOX 1443

dc characteristics

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

†

5 V to xVCC

160

m

Ω

†

3.3 V to xVCC

225

m

Ω

Switch resistances†

5 V to xVPP

6

3.3 V to xVPP

6

Ω

12 V to xVPP

1

VO(xVPP)

Clamp low voltage

Ipp at 10 mA

0.8

V

VO(xVCC)

Clamp low voltage

ICC at 10 mA

0.8

V

Ipp High-impedance

TA = 25°C

1

10

Ilk

Leakage current

g

state

TA = 85°C

50

µA

Ilkg

Leakage current

ICC High-impedance

TA = 25°C

1

10

µA

CC

g

state

TA = 85°C

50

II

Input current

IDD Supply current

VO(AVCC) = VO(BVCC) = 5 V,

VO(AVPP) = VO(BVPP) = 12 V

83

150

µA

II

Input current

IDD Supply current

in shutdown

VO(BVCC) = VO(AVCC) = VO(AVPP)

= VO(BVPP) = Hi-Z

1

µA

Power-ready threshold,

PWR_GOOD

10.72

11.05

11.4

V

Power-ready hysteresis,

PWR_GOOD

12-V mode

50

mV

Short-circuit output-

IO(xVCC)

TJ = 85°C,

0.75

1.3

1.9

A

current limit

IO(xVPP)

J

,

Output powered up into a short to GND

120

200

400

mA

† Pulse-testing techniques are used to maintain junction temperature close to ambient temperature; thermal effects must be taken into account

separately.

logic section

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

Logic input current

1

µA

Logic input high level

2

V

Logic input low level

0.8

V

Logic output high level

IO =1mA

VDD – 0.4

V

Logic output low level

IO = 1 mA

0.4

V

Logic input minimum pulse width

1

µs