SN54ALS165, SN74ALS165

PARALLEL-LOAD 8-BIT REGISTERS

SDAS157B – JUNE 1982 – REVISED DECEMBER 1994

2

POST OFFICE BOX 655303

SRG8

C1 [LOAD]

1

15

CLK INH

2

CLK

14

D

2D

10

SER

1D

11

A

1D

12

B

13

C

3

E

4

F

5

G

1D

6

H

C2/

7

9

≥1

SH/LD

QH

QH

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for the D, J, and N packages.

logic diagram (positive logic)

S

1D

R

C1

S

1D

R

C1

S

1D

R

C1

S

1D

R

C1

S

1D

R

C1

S

1D

R

C1

S

1D

R

C1

S

1D

R

C1

1

15

2

10

SH/LD

CLK INH

CLK

SER

9

7

QH

QH

11

12

13

14

3

4

5

6

AB

CD

E

F

G

H

Pin numbers shown are for the D, J, and N packages.