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EPC4 датащи(PDF) 33 Page - Altera Corporation

номер детали EPC4
подробное описание детали  SRAM-Based LUT Devices
PDF  36 Pages
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производитель  ALTERA [Altera Corporation]
домашняя страница  http://www.altera.com
Logo ALTERA - Altera Corporation

EPC4 датащи(HTML) 33 Page - Altera Corporation

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33
Configuration Devices for SRAM-Based LUT Devices Data Sheet
Table 22. ACEX 1K, FLEX 10K & FLEX 6000 Device Configuration Parameters Using EPC1 &
EPC1441 Devices at 5.0-V
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tCE
OE
high to first clock delay
200
ns
tOEZX
OE
high to data output enabled
50
ns
tCO
DCLK
to data out delay
20
ns
tMCH
DCLK
high time for the first device in the
configuration chain
30
50
75
ns
tMCL
DCLK
low time for the first device in the
configuration chain
30
50
75
ns
fCK
Clock frequency
6.7
10
16.7
MHz
tSCH
DCLK
high time for subsequent devices
30
ns
tSCL
DCLK
low time for subsequent devices
30
ns
tCASC
CLK
rising edge to nCASC
20
ns
tCCA
nCS
to nCASC cascade delay
10
ns
fCDOE
CLK
to data enable/disable
20
ns
tOEC
OE
low to CLK disable delay
20
ns
tNRCAS
OE
low (reset) to nCASC delay
25
ns
tNRR
OE
low time (reset) minimum
100
ns
Table 23. ACEX 1K, FLEX 10K & FLEX 6000 Device Configuration Parameters Using EPC1 &
EPC1441 Devices at 3.3-V
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tCE
OE
high to first clock delay
300
ns
tOEZX
OE
high to data output enabled
80
ns
tCO
DCLK
to data out delay
30
ns
tMCH
DCLK
high time for the first device in the
configuration chain
50
125
250
ns
tMCL
DCLK
low time for the first device in the
configuration chain
50
125
250
ns
fCK
Clock frequency
2
4
10
MHz
tSCH
DCLK
high time for subsequent devices
50
ns
tSCL
DCLK
low time for subsequent devices
50
ns
tCASC
CLK
rising edge to nCASC
25
ns
tCCA
nCS
to nCASC cascade delay
15
ns
fCDOE
CLK
to data enable/disable
30
ns
tOEC
OE
low to CLK disable delay
30
ns
tNRCAS
OE
low (reset) to nCASC delay
30
ns
tNRR
OE
low time (reset) minimum
100
ns



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