LTC2921IGN datasheet(17/20 Pages) LINER

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LTC2921/LTC2922 Series

29212fa

APPLICATIO S I FOR ATIO

Next, consider the supply ramping N-channel MOSFETs

Q0, Q1 and Q2. Transistor Q0 will have >4.5V of gate-

source voltage, even at maximum supply voltage (5.375V)

and minimum GATE pin voltage (10V). Considering the

voltages, temperatures, and currents involved, the maxi-

mum on-resistance (RQ(ON)(MAX)) of the Vishay Siliconix

Si2316DS is about 150m

Ω. Switches Q1 and Q2 will see

even higher gate-source voltages, implying even smaller

RQ(ON)(MAX) values. Table 2 summarizes the calculated

VQ(ON)(MAX) voltages. Include the additional 50mV drop

across RSENSE when budgeting for the VCC supply path.

Table 2. External MOSFET Drain-Source Voltage Drops

Supply

External

RQ(ON)

VQ(ON)

Voltage

MOSFET

Max

120mV

~150m

Ω

0.8A

(+50mV = 170mV)

3.3V

<150m

Ω

1.6A

<240mV

2.5V

<150m

Ω

0.4A

<60mV

The

±20V absolute maximum gate-source voltage rating

of the Si2316DS easily accommodates this design.

Next, calculate the necessary capacitance on the GATE pin

to realize the desired ramp rate. Use the nominal value of

VGATE from the Electrical Specification, and choose a

standard value.

Ams

GATE =

=µ ≈

500

10 8

0 463

0 47

•

Include drain bypass capacitors of 0.1

µF and series gate

resistors of 10

ΩoneachexternalpowerFETtodampturn-

on oscillations.

Find the capacitance at the TIMER pin required to set the

delays in the power-on sequence:

TIMER =

=µ ≈

150

0 25

0 22

•.

The application requires the use of the circuit breaker

function on the VCC supply. First, find the upper limit on the

sense resistor value:

SENSE ≤=

Ω

53 25

Select a precision power sense resistor, such as the

Vishay Dale WSL1206 series. They can be specified to 1%,

and exhibit <1% variation over the LTC2921/LTC2922

operating range; choose RSENSE = 50mΩ. Including toler-

ances, the circuit breaker trip current threshold variation

will be:

TRIP MIN

TRIP MAX

()

Ω

088

112

The PG pin is configured as a 2.5V negative-logic reset

signal for the microcontroller. The minimum pull-up resis-

tance for proper operation is:

PG MIN

()

.– .

=≈

Ω

2 6875

0 4

460

Figure 13 shows RPG = 4.7k. The value is somewhat

arbitrarily chosen, but it does limit the pull-down current

to <500

µA. Trade off lower pull-down currents against

faster pull-up edge rates in other applications.

Recall that proper operation of the remote load sensing

function requires:

RQ(ON), RFB(ON) << RX << (RY +RZ)

In this example, the operating conditions and the Si2316DS

give RQ(ON)(MAX) = 150mΩ, the Electrical Characteristics

table guarantees RFB(ON) < 10Ω, and the example design

specification requires that (RY + RZ) <100k. Selecting RX0

= RX1 = RX2 = 100Ω satisfies the inequality.

Before the loads are connected to the supplies, the voltage

error due to the RX resistors will be <0.1% for all three

supplies:

∆=

Ω









of V

SRC

•. %

100

1000

After the remote sense switches close, the load voltage

errors due to RX at maximum loads will be:

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