GRSPW datasheet(2/48 Pages) ACTEL

2 / 48 page

GRSPW / GRSPW-FT

December 2008, Version 1.0.2

GAISLER

Introduction

1.1

Overview

The GRSPW core implements a SpaceWire Codec with RMAP support and AMBA host interface.

The core implements the ECSS SpaceWire standard with the protocol identification extension and

Remote Memory Access Protocol (RMAP).

Receive and transmit data is autonomously transferred between the SpaceWire Codec and the AMBA

AHB bus using DMA transfers. Through the use of receive and transmit descriptors, multiple

SpaceWire packets can be received and transmitted without CPU involvement. The GRSPW control

registers are accessed through an APB interface.

1.2

Example application

The GRSPW core has been designed to fit into an architecture from which a large variety of applica-

tions can be derived. The architecture is centered around the AMBA Advanced High-speed Bus

(AHB), to which the GRSPW core and other high-bandwidth units are connected. Low-bandwidth

units connected to the AMBA Advanced Peripheral Bus (APB) which is accessed through an AHB to

APB bridge. The architecture is shown in figure 2.

Figure 1. GRSPW block diagram

AMBA AHB

GRSPW

SpaceWire

APB slave

AHB master

SpaceWire signals

AMBA APB

RMAP Ctrl

Codec

Registers

Figure 2. Architectural block diagram of a typical system using the SpaceWire codec

LEON3FT

32-bit SPARC

Integer Unit

I-cache

Debug

Support

Unit

D-cache

CAN

2.0

Controller

Memory

Controller

with EDAC

SDRAM

Controller

with EDAC

SpaceWire

Codec

Interface

Mil-Std-1553

BC/RT/MT

Interface

2 x UART

16 x GPIO

Mil-Std-1553

Interface

32-bit AMBA AHB

Timers

Interrupt

AHB / APB

UART

Debug

Link

JTAG

Debug

Link

On-Chip

Memory

with EDAC

FPU

PROM/SRAM

SDRAM

LVDS I/F

CAN-2.0

Dual-1553

AHB

CTRL

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