Features

• Dual 19.44 MHz Input References

• Primary 155.52 MHz LVPECL Outputs with Disable Function

• Secondary 51.84 MHz CMOS Output

• Phase Locked Output Frequency Control

• Intrinsically Low Jitter Crystal Oscillator

• LOR & LOL Alarm

• Force Free Run Function

• Automatic Free Run operation on loss of both References A & B

• Input Duty Cycle Tolerant

• 3.3V dc Power Supply

• Small Size: 1 Square Inch

SCG4521

Synchronous Clock

Generators

PLL

2111 Comprehensive Drive

Aurora, Illinois 60505

Phone: 630-851-4722

Fax: 630-851-5040

www.conwin.com

Bulletin

SG036

Page

1 of 16

Revision

A02

Date

25 Oct 01

Issued By

MBatts