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F75111RG датащи(PDF) 27 Page - Feature Integration Technology Inc.

номер детали F75111RG
подробное описание детали  Low Power GPIO Datasheet
PDF  45 Pages
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производитель  FINTEK [Feature Integration Technology Inc.]
домашняя страница  http://www.fintek.com.tw/eng
Logo FINTEK - Feature Integration Technology Inc.

F75111RG датащи(HTML) 27 Page - Feature Integration Technology Inc.

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July, 2007
V0.27P
- 25 -
F75111
7.27 GPIO2x Pulse Width Control Register – Index 24h
Power-on default [7:0] =0000_0000b
Bit
Name
R/W
PWR
Description
7:2
Reserved
R/W
VSB3V
Reserved. Read return 0.
1:0
GP2_PLSWD[1:0
]
R/W
VSB3V
GPIO2x pulse width. If set the GPIO2x to pulse mode, the pulse width
can be defined as follows.
00b – 500us (Default)
01b – 1ms
10b – 20ms
11b – 100ms
7.28 GPIO2x Pull-up Resistor Control Register – Index 25h
Power-on default [7:0] =0000_0000b
Bit
Name
R/W
PWR
Description
7
GP27_RESON
R/W
VSB3V
Turn on the GPIO27 internal pull-up resistor.
6
GP26_RESON
R/W
VSB3V
Turn on the GPIO26 internal pull-up resistor.
5
GP25_RESON
R/W
VSB3V
Turn on the GPIO25 internal pull-up resistor.
4
GP24_RESON
R/W
VSB3V
Turn on the GPIO24 internal pull-up resistor.
3
GP23_RESON
R/W
VSB3V
Turn on the GPIO23 internal pull-up resistor.
2
GP22_RESON
R/W
VSB3V
Turn on the GPIO22 internal pull-up resistor.
1
GP21_RESON
R/W
VSB3V
Turn on the GPIO21 internal pull-up resistor.
0
GP20_RESON
R/W
VSB3V
Turn on the GPIO20 internal pull-up resistor.
7.29 GPIO2x Input De-bounce Register – Index 26h
Power-on default [7:0] =0000_0000b
Bit
Name
R/W
PWR
Description
7
GP27_ENDB
R/W
VSB3V
Enable GPIO27 input de-bounce with 7u or 25ms second that selected
by 0x2C bit7.
6
GP26_ENDB
R/W
VSB3V
Enable GPIO26 input de-bounce with 7u or 25ms second that selected



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