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6399A–DRMSD–13-Oct-08

ATSAM2553

12. Overview of Operations

Note: the reader should be familiar with the ATSAM97xx series operation. Refer to the

ATSAM9707 product development kit “prgdvkit.pdf” document.

This chapter describes operations and registers specific to the ATSAM2553.

12.1

Memory Mapping

12.2

I/O Mapping

12.3

LCD Interface

The ATSAM2553 can be directly connected to most LCD displays.

The ATSAM2553 provides an 8-bit data bus, DB0-DB7 and 3 output control pins RS, RW, ENB.

All the LCD pins are controlled by I/O Access ADD 0AH. The IO reads only the 8-bit data bus.

The IO writes into the 11-bit LCD_Reg:

Size

(in word)

Address

Low

Address

High

Access

256

000:0000

000:00FF

ATSAM97xx standard routine ROM

768

000:0100

000:03FF

Built in debug ROM

32M - 1K

000:0400

1FF:FFFF

External ROM/Flash (WCS0/)

32K

200:0000

200:7FFF

Built in SRAM

4K

200:8000

200:8FFF

External memory page XIO (XIO/)

4K

200:9000

200:9FFF

Not used

216K

200:A000

203:FFFF

Not used

32M - 256K

204:0000

3FF:FFFF

External SRAM (WCS1)

Write

Read

0-9

0-9

Standard ATSAM97xx I/O (Refer to prgdvkit.pdf)

0A

0A

LCD port

0B

X

Keyboard config

0C - 0E

0C - 0E

Scanning port ADD0-2

0F

0F

GPIO Control/Status

LCD_Reg[7:0]

DB[7:0]

LCD_Reg[8]

RS

LCD_Reg[9]

RW

LCD_Reg[10]

ENB