9

6399A–DRMSD–13-Oct-08

ATSAM2553

The ATSAM2553 connects to a variety of stereo DACs or CODECs from 16 to 20 bits, with Jap-

anese or I2S format. When Japanese format is used, only 16 bits are supported without external

circuitry

Table 4-6.

Digital Audio Group

Pin Name

Pin#

Type

Function

CKOUT

120

OUT

Master clock for

Σ/Δ DAC (256 x Fs)

DABD0-

DABD1

123,124

OUT

Serial data for 2 stereo output channels.

DAAD

125

IN 5VT

Serial data for 1 stereo input channel

CLBD

121

OUT

Digital audio bit clock

WSBD

122

OUT

Digital audio left/right select

Table 4-7.

Miscellaneous Group

Pin Name

Pin#

Type

Function

P0-P3

60-63

I/O 5VT

General purpose programmable I/O pins.

P0 pin can be used as general purpose I/O or as ROW4

function. These pins have a built-in pull down.

DBCLK

117

IN 5VT

Debug clock, should be connected to VD33 under normal

operation. If DBCLK is found low just after RESET, then the

internal ROM debugger/Flash programmer is started.

DBDATA

119

I/O 5VT

Debug data, allows serial communication for debug/Flash

programming. This pin has a built-in pull down.

DBACK

118

OUT

Debug ack, toggled each time a bit is received/sent on DBDATA.

RESET

103

IN 5VT

Reset input, active low. This is a Schmitt trigger input, allowing

direct connection of a RC network.

PDWN

39

IN

Power down, active low. When power down is active, WCS0,

WCS1, XIO, WWE, WOE address and data lines are floated. All

other outputs are set to 0. The crystal oscillator is stopped,

OUTVC18 is set to 0 and 1.8V supply voltage is removed from

the core. To exit from power down, PDWN must be set to VD33,

then RESET applied. When unused this pin must be connected

to VD33.

OUTVC18

41

PWR

3.3V to 1.8 V regulator output. The built-in regulator gives 1.8V

for internal use (core supply). PLL supply pin VD18 could also

be connected to this pin. Decoupling capacitors 470 pF in

parallel with 2.2 or 4.7 µF must be connected between

OUTVC18 and GND.

X1-X2

101,102

-

12.288 MHz (nominal) crystal connection. An external clock can

also be used at X1.

TEST0-

TEST1

2,99

IN

Test pins, should be grounded.