LPC2921 datasheet(17/81 Pages) PHILIPS

17 / 81 page

LPC2921_2923_2925_0

Preliminary data sheet

Rev. 00.01 — 24 October 2008

17 of 81

NXP Semiconductors

LPC2921/2923/2925

ARM9 microcontroller with CAN and LIN

• Programming by CPU via AHB

• Programming by external programmer via JTAG

• JTAG access protection

• Burn-finished and erase-finished interrupt

6.8.1 Functional description

After reset flash initialization is started. During this initialization, flash access is not

possible and AHB transfers to flash are stalled, blocking the AHB bus.

During flash initialization, the index sector is read to identify the status of the JTAG access

protection and sector security. If JTAG access protection is active, the flash is not

accessible via JTAG. In this case, ARM debug facilities are disabled and flash-memory

contents cannot be read. If sector security is active, only the unsecured sections can be

read.

Flash can be read synchronously or asynchronously to the system clock. In synchronous

operation, the flash goes into standby after returning the read data. Started reads cannot

be stopped, and speculative reading and dual buffering are therefore not supported.

With asynchronous reading, transfer of the address to the flash and of read data from the

flash is done asynchronously, giving the fastest possible response time. Started reads can

be stopped, so speculative reading and dual buffering are supported.

Buffering is offered because the flash has a 128-bit wide data interface while the AHB

interface has only 32 bits. With buffering a buffer line holds the complete 128-bit flash

word, from which four words can be read. Without buffering every AHB data port read

starts a flash read. A flash read is a slow process compared to the minimum AHB cycle

time, so with buffering the average read time is reduced improving system performance.

With single buffering, the most recently read flash word remains available until the next

flash read. When an AHB data-port read transfer requires data from the same flash word

as the previous read transfer, no new flash read is done and the read data is given without

wait cycles.

When an AHB data port read transfer requires data from a different flash word to that

involved in the previous read transfer, a new flash read is done and wait states are given

until the new read data is available.

With dual buffering, a secondary buffer line is used, the output of the flash being

considered as the primary buffer. On a primary buffer, hit data can be copied to the

secondary buffer line, which allows the flash to start a speculative read of the next flash

word.

Both buffer lines are invalidated after:

• Initialization

• Configuration-register access

• Data-latch reading

• Index-sector reading

The modes of operation are listed in Table 9.

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