LPC2921 datasheet(14/81 Pages) PHILIPS

14 / 81 page

LPC2921_2923_2925_0

Preliminary data sheet

Rev. 00.01 — 24 October 2008

14 of 81

NXP Semiconductors

LPC2921/2923/2925

ARM9 microcontroller with CAN and LIN

6.7.2 Base clock and branch clock relationship

Table 7 contains an overview of all the base blocks in the LPC2921/2923/2925 and their

derived branch clocks. A short description is given of the hardware parts that are clocked

with the individual branch clocks. In relevant cases more detailed information can be

found in the specific subsystem description. Some branch clocks have special protection

since they clock vital system parts of the device and should not be switched off. See

Section 6.15.5 for more details of how to control the individual branch clocks.

Fig 4.

LPC2921/2923/2925 overview of clock areas

TIMER0/1 MTMR

PWM0/1/2/3

ADC1/2

QEI

modulation and sampling

control subsystem

BASE_MSCSS_CLK

branch

clocks

branch

clocks

BASE_ADC_CLK

BA SE_ICLK0_CLK

BASE_ICLK1_CLK

CAN0/1

GLOBAL

ACCEPTANCE

FILTER

LIN0/1

I2C0/1

networking subsystem

BASE_IVNSS_CLK

branch

clocks

RESET/CLOCK

GENERATION &

POWER

MANAGEMENT

power control subsystem

BASE_PCR_CLK

branch

clock

GPIO0/1/5

TIMER 0/1/2/3

SPI0/1/2

UART0/1

WDT

BASE_SYS_CLK

CPU

AHB MULTILAYER MATRIX

VIC

GPDMA

USB REGISTERS

FLASH/SRAM

general subsytem

peripheral subsystem

AHB TO APB BRIDGES

SYSTEM CONTROL

EVENT ROUTER

CFID

branch

clocks

BASE_SAFE_CLK

BASE_UART_CLK

BASE_SPI_CLK

BASE_TMR_CLK

002aae238

CGU0

CGU1

BASE_USB_CLK

BASE_OUT_CLK

USB

CLOCK

OUT

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