SC471AEVB datasheet(11/27 Pages) SEMTECH

11 / 27 page

SC471/SC471A

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POWER MANAGEMENT

The output over-voltage OVP point is raised to 50%

above nominal, or 1.125V at FB. When going from

a higher to lower voltage, the G0/G1 change causes

rapid change of D0/D1, which in turns cause a rapid

change at FB. The temporary increase in OVP allows

the output to slew down to the new level without

tripping the OVP function.

VOUT Voltage Selection

VOUT voltage is regulated through the FB pin via resistors

R1 through R4 as shown in Figure 4.

TON

0.75V

SC471/A

VOUT

Logic

Control

Figure 4

The following table shows the equations that set VOUT as

a function of control inputs G0/G1:

VOUT Equation

SC471

SC471A

0.75 • (1 + R1/R2)

0011

0.75 • (1 + R1/R2 + R1/R3)

0110

0.75 • (1 + R1/R2 + R1/R4)

1001

0.75 • (1 + R1/R2 + R1/R3 + R1/R4)

1100

Note: the RDSON of the internal D0/D1 mosfets is in series

with R3/R4, which adds typically 15 ohms in series.

Voltage Transitioning

The G0/G1 pins allow VOUT to transition to both higher

and lower values. The two directions have differing

responses.

When doing a down transition, the D0/D1 change will

cause FB to go above the 0.75V threshold. Depending on

the level of VOUT change and the load, the IC responds in

different ways. At light load conditions when power-save

is active, and when the downward change is 8% or greater,

the rapid change of D0/D1 is large enough to cause FB

to rise up to the Smart Power Save threshold (810mV).

DL will drive high to turn on the low-side MOSFET and

draw current from the output capacitor via the inductor.

DL will remain on until FB falls to 0.75V, at which point

a normal DH switching cycle begins, see Figure 5. This

causes the output to transition to the new voltage level

quickly, typically 10~20 usec. Refer to the Smart Power

Save Protection section for a full description.

A rapid downward change in VOUT also occurs for downward

changes less than 8%, provided the load is high enough

such that power-save is not active. In this case, after D0

opens and FB rises above the 0.75V trip point, DL will drive

high and stay high until FB drops to the trip point.

VOUT

D0/D1

750mV

810mV

(FB threshold)

RTN

VOUT

Initial VOUT

Final VOUT

R3/R4

(Smart Psave threshold)

Figure 5

Applications Information (continued)

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