PCF8576DTSLASH2 datasheet(24/52 Pages) NXP

24 / 52 page

PCF8576D_7

Product data sheet

Rev. 7 — 18 December 2008

24 of 52

NXP Semiconductors

PCF8576D

Universal LCD driver for low multiplex rates

In single device applications, the hardware subaddress inputs A0, A1 and A2 are normally

tied to VSS which deﬁnes the hardware subaddress 0. In multiple device

applications A0, A1 and A2 are tied to VSS or VDD in accordance with a binary coding

scheme such that no two devices with a common I2C-bus slave address have the same

hardware subaddress.

7.16.6 Input ﬁlters

To enhance noise immunity in electrically adverse environments, RC low-pass ﬁlters are

provided on the SDA and SCL lines.

7.16.7 I2C-bus protocol

Two I2C-bus slave addresses (0111 000 and 0111 001) are reserved for the PCF8576D.

The least signiﬁcant bit of the slave address that a PCF8576D will respond to is deﬁned by

the level tied to its SA0 input. The PCF8576D is a write-only device and will not respond to

a read access. Having two reserved slave addresses allows the following on the same

I2C-bus:

• Up to 16 PCF8576Ds for very large LCD applications

• The use of two types of LCD multiplex drive.

The I2C-bus protocol is shown in Figure 17. The sequence is initiated with a START

condition (S) from the I2C-bus master which is followed by one of two possible PCF8576D

slave addresses available. All PCF8576Ds whose SA0 inputs correspond to bit 0 of the

slave address respond by asserting an acknowledge in parallel. This I2C-bus transfer is

ignored by all PCF8576Ds whose SA0 inputs are set to the alternative level.

After an acknowledgement, one or more command bytes follow, that deﬁne the status of

each addressed PCF8576D.

The last command byte sent is identiﬁed by resetting its most signiﬁcant bit, continuation

bit C, (see Figure 18). The command bytes are also acknowledged by all addressed

PCF8576Ds on the bus.

Fig 17. I2C-bus protocol

mdb078

011100

0 A C

COMMAND

DISPLAY DATA

slave address

R/W

acknowledge by

all addressed

PCF8576Ds

acknowledge

by A0, A1 and A2

selected

PCF8576D only

1 byte

update data pointers

and if necessary,

subaddress counter

≥ 1 byte(s)

≥ 0 byte(s)

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