AD9522-2 datasheet(23/84 Pages) AD

номер детали	AD9522-2

подробное описание детали	12 LVDS/24 CMOS Output Clock Generator with Integrated 2.2 GHz VCO

PDF	84 Pages

Scroll/Zoom	100%

производитель	AD [Analog Devices]

домашняя страница	http://www.analog.com

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23 / 84 page

AD9522-2

Rev. 0 | Page 23 of 84

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FREQUENCY (Hz)

Figure 24. Internal VCO Phase Noise (Absolute), LVDS Output @ 725 MHz

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Figure 25. Internal VCO Phase Noise (Absolute), LVDS Output @ 778.3 MHz

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Figure 26. Additive (Residual) Phase Noise,

CLK-to-LVDS @ 245.76 MHz, Divide-by-1

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Figure 27. Additive (Residual) Phase Noise,

CLK-to-LVDS @ 200 MHz, Divide-by-5

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Figure 28. Additive (Residual) Phase Noise,

CLK-to-LVDS @ 800 MHz, Divide-by-1

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Figure 29. Additive (Residual) Phase Noise,

CLK-to-CMOS @ 50 MHz, Divide-by-20

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