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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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7733 датащи(PDF) 374 Page - Renesas Technology Corp |
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7733 датащи(HTML) 374 Page - Renesas Technology Corp |
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374 / 940 page  CLOCK GENERATING CIRCUIT 7733 Group User’s Manual 14–11 14.3.2 System clock switching procedure Figures 14.3.6 to 14.3.8 show the system clock switching procedure. 14.3 Clock control Fig. 14.3.6 System clock switching procedure (1) State of bits 4 to 1 of the oscillation circuit control register 0 when switching the system clock Stopped Operating Operating Port-Xc selection bit (bit 4) System clock selection bit (bit 3) Main clock stop bit (bit 2) (Sub-clock oscillation circuit: Oscillating) (Main clock) (Sub clock) (Main clock) (Stopped) (Oscillating) ab “1” “0” “1” “0” “1” “0” System clock Main clock Sub clock Main clock (Main-clock oscillation circuit: Oscillating) Oscillation of the main-clock oscillation circuit Oscillation stabilizing time Stopped Operating Oscillation of the sub-clock oscillation circuit Oscillation stabilizing time Notes 1: Before selecting the sub clock, make sure that oscillation of the sub clock is fully stabilized after oscillation starts. 2: Before selecting the main clock, make sure that oscillation of the main clock is fully stabilized after oscillation restarts. (Note 1) (Note 2) |
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