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4501 датащи(PDF) 21 Page - Renesas Technology Corp |
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4501 датащи(HTML) 21 Page - Renesas Technology Corp |
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21 / 212 page ![]() 1-9 4501 Group HARDWARE Rev.2.01 Feb 07, 2005 REJ09B0192-0201 PORT BLOCK DIAGRAMS D0, D1 S RQ (Note 1) D2/C S RQ Skip decision (SZD instruction) (Note 1) PU22 S RQ K22 Pull-up transistor (Note 2) “L” level detection circuit D3/K S RQ PU23 D TQ A0 OKA instruction Register A IAK instruction K23 (Note 2) SD instruction Decoder Skip decision (SZD instruction) Register Y RD instruction CLD instruction Skip decision (SNZCP instruction) SD instruction RD instruction CLD instruction Decoder Register Y SCP instruction RCP instruction Key-on wakeup Skip decision (SZD instruction) (Note 1) Pull-up transistor “L” level detection circuit SD instruction RD instruction CLD instruction Decoder Register Y Key-on wakeup This symbol represents a parasitic diode on the port. 2: Applied potential to ports D2/C and D3/K must be VDD or less. Notes 1: Port block diagram (1) PIN DESCRIPTION |
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