R8C13 datasheet(71/224 Pages) RENESAS

71 / 224 page

Rev.1.20

Jan 27, 2006

page 60 of 205

REJ09B0111-0120

R8C/13 Group

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10.2 INT Interrupt

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10.2.1 INT0 Interrupt

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INT0 interrupt is triggered by an INT0 input. When using INT0 interrupts, the INT0EN bit in the INTEN

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The INT0 pin is shared with the external trigger input pin of Timer Z.

Figure 10.10 shows the INTEN and INT0F registers.

Figure 10.10 INTEN and INT0F Registers

External input enable register

Bit name

Function

Bit symbol

SymbolAddressAfter reset

INTEN

009616

0016

INT0EN

b7b6b5b4b3b2b1b0

INT0 input enable bit(1)

0 : Disabled

1 : Enabled

0 : One edge

1 : Both edges

Set to “0”

INT0 input polarity select bit(2)

Reserved bit

INT0PL

(b7-b2)

NOTES:

1. This bit must be set while the INT0STG bit in the PUM register is set to “0” (one-shot trigger disabled).

2. When setting the INT0PL bit to “1” (selecting both edges), the POL bit in the INT0IC must be set to “0”

(selecting falling edge).

3. The IR bit in the INT0IC register may be set to “1” (interrupt requested) when the INT0PL bit is rewritten.

Refer to the paragraph 19.2.5 “Changing Interrupt Factor” in the Usage Notes Reference Book.

INT0 input filter select register

Bit name

Function

Bit symbol

Symbol

Address

After reset

INT0F

001E16

XXXXX0002

INT0F0

b7b6b5b4b3b2

b1b0

0 0 : No filter

0 1 : Filter with f1 sampling

1 0 : Filter with f8 sampling

1 1 : Filter with f32 sampling

Set to “0”

Reserved bit

INT0F1

b1 b0

INT0 input filter select bit

Nothing is assigned.

When write, set to “0”. If read, it content is indeterminate.

(b2)

(b7-b3)

000

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10.2 INT Interrupt

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