7534 datasheet(13/221 Pages) RENESAS

13 / 221 page

7534 Group

List of tables

Rev.3.00

Oct 23, 2006

page 9 of 9

REJ09B0178-0300

List of tables

CHAPTER 1 HARDWARE

Table 1 Pin description .................................................................................................................... 8

Table 2 List of supported products ................................................................................................ 9

Table 3 Push and pop instructions of accumulator or processor status register .................. 11

Table 4 Set and clear instructions of each bit of processor status register .......................... 12

Table 5 I/O port function table ...................................................................................................... 17

Table 6 Interrupt vector address and priority ............................................................................. 20

Table 7 Relation of the width of SE0 and the state of the device ......................................... 33

Table 8 Special programming adapter ......................................................................................... 43

Table 9 Interrupt sources, vector addresses and interrupt priority .......................................... 44

Table 10 Change of A/D conversion register during A/D conversion ..................................... 46

Table 11 Stop mode state ............................................................................................................. 48

Table 12 Wait mode state ............................................................................................................. 49

Table 13 Description of improved USB function for 7534 Group ............................................ 50

Table 14 Differences among 32-pin, 36-pin and 42-pin ............................................................ 50

Table 15 Differences among 32-pin, 36-pin and 42-pin (SFR) ................................................ 51

CHAPTER 2 APPLICATION

Table 2.1.1 Handling of unused pins ............................................................................................. 7

Table 2.2.1 CNTR0 active edge switch bit function ................................................................... 13

Table 2.3.1 Setting example of baud rate generator (BRG) and transfer bit rate values .... 44

Table 2.4.1 Transfer types of USB ............................................................................................... 50

Table 2.4.2 Packet types of USB ................................................................................................. 52

Table 2.4.3 Data structure of USB packet .................................................................................. 53

Table 2.4.4 PID ............................................................................................................................... 53

Table 2.4.5 Special signal of USB ............................................................................................... 54

CHAPTER 3 APPENDIX

Table 3.1.1 Absolute maximum ratings .......................................................................................... 2

Table 3.1.2 Recommended operating conditions .......................................................................... 3

Table 3.1.3 Electrical characteristics (1) ........................................................................................ 4

Table 3.1.4 Electrical characteristics (2) ........................................................................................ 5

Table 3.1.5 A/D Converter characteristics (1) ............................................................................... 5

Table 3.1.6 Timing requirements .................................................................................................... 6

Table 3.1.7 Switching characteristics ............................................................................................. 6

Table 3.3.1 Programming adapters .............................................................................................. 23

Table 3.3.2 PROM programmer address setting ........................................................................ 24

Table 3.5.1 CNTR0 active edge switch bit function ................................................................... 45

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