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7534 датащи(PDF) 49 Page - Renesas Technology Corp

номер детали 7534
подробное описание детали  8-BIT SINGLE-CHIP MICROCOMPUTER
PDF  221 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
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7534 датащи(HTML) 49 Page - Renesas Technology Corp

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HARDWARE
7534 Group
FUNCTIONAL DESCRIPTION
Rev.3.00
Oct 23, 2006
page 36 of 55
REJ09B0178-0300
A/D Converter
The functional blocks of the A/D converter are described below.
[A/D conversion register] AD
The A/D conversion register is a read-only register that stores the
result of A/D conversion. Do not read out this register during an A/D
conversion.
[A/D control register] ADCON
The A/D control register controls the A/D converter. Bit 2 to 0 are
analog input pin selection bits. Bit 4 is the AD conversion completion
bit. The value of this bit remains at “0” during A/D conversion, and
changes to “1” at completion of A/D conversion.
A/D conversion is started by setting this bit to “0” except during an A/
D conversion.
[Comparison voltage generator]
The comparison voltage generator divides the voltage between VSS
and VREF by 1024 by a resistor ladder, and outputs the divided volt-
ages. Since the generator is disconnected from VREF pin and VSS
pin, current is not flowing into the resistor ladder.
[Channel Selector]
The channel selector selects one of ports P27/AN7 to P20/AN0, and
inputs the voltage to the comparator.
[Comparator and control circuit]
The comparator and control circuit compares an analog input volt-
age with the comparison voltage and stores its result into the A/D
conversion register. When A/D conversion is completed, the control
circuit sets the AD conversion completion bit and the AD interrupt
request bit to “1”. Because the comparator is constructed linked to a
capacitor, set f(XIN) to 500 kHz or more during A/D conversion.
Fig. 37 Structure of A/D control register
Fig. 38 Structure of A/D conversion register
Fig. 39 Block diagram of A/D converter
A/D control register
(ADCON : address 003416)
Not used (returns “0” when read)
Not used (returns “0” when read)
AD conversion completion bit
0 : Conversion in progress
1 : Conversion completed
b7
b0
Analog input pin selection bits
000 : P20/AN0
001 : P21/AN1
010 : P22/AN2
011 : P23/AN3
100 : P24/AN4
101 : P25/AN5
110 : P26/AN6
111 : P27/AN7
A/D control register
(Address 003416)
A/D control circuit
Resistor ladder
VSS
Comparator
A/D interrupt request
b7
b0
Data bus
3
10
P20/AN0
P21/AN1
P22/AN2
P23/AN3
P24/AN4
P25/AN5
P26/AN6
P27/AN7
A/D conversion register (low-order)
(Address 003616)
(Address 003516)
A/D conversion register (high-order)
VREF
Read 8-bit (Read out only address 003516)
b7
b0
b9
b8
b7
b6
b5
b4
b3
b2
(Address 003516)
Read 10-bit (read out in order address 003616, 003516)
b7
b0
b9
b8
(Address 003616)
b7
b0
b7
b6
b5
b4
b3
b2
b1
b0
(Address 003516)
High-order 6-bit of address 003616 returns “0” when read.



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