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H8S2245 датащи(PDF) 267 Page - Renesas Technology Corp |
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H8S2245 датащи(HTML) 267 Page - Renesas Technology Corp |
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267 / 818 page ![]() Section 8 I/O Ports Rev.3.00 Mar. 26, 2007 Page 225 of 772 REJ09B0355-0300 Port 2 Data Direction Register (P2DDR) 7 P27DDR 0 W 6 P26DDR 0 W 5 P25DDR 0 W 4 P24DDR 0 W 3 P23DDR 0 W 0 P20DDR 0 W 2 P22DDR 0 W 1 P21DDR 0 W Bit Initial value R/W : : : P2DDR is an 8-bit write-only register, the individual bits of which specify input or output for the pins of port 2. P2DDR cannot be read; if it is, an undefined value will be read. Setting a P2DDR bit to 1 makes the corresponding port 2 pin an output pin, while clearing the bit to 0 makes the pin an input pin. This register is a write-only register, and cannot be written by bit manipulation instruction. For details, see section 2.10.4, Access Methods for Registers with Write-Only Bits. P2DDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior state after a manual reset, and in software standby mode. As the 8-bit timer is initialized by a manual reset, the pin states are determined by the P2DDR and P2DR specifications. Port 2 Data Register (P2DR) 7 P27DR 0 R/W 6 P26DR 0 R/W 5 P25DR 0 R/W 4 P24DR 0 R/W 3 P23DR 0 R/W 0 P20DR 0 R/W 2 P22DR 0 R/W 1 P21DR 0 R/W Bit Initial value R/W : : : P2DR is an 8-bit readable/writable register that stores output data for the port 2 pins (P2 7 to P20). P2DR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior state after a manual reset, and in software standby mode. |
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