H8S2245 datasheet(256/818 Pages) RENESAS

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Section 8 I/O Ports

Rev.3.00 Mar. 26, 2007 Page 214 of 772

REJ09B0355-0300

8.2.2

Table 8.2 shows the port 1 register configuration.

Table 8.2

Port 1 Registers

Name

Abbreviation

R/W

Initial Value

Address*

Port 1 data direction register

P1DDR

H'00

H'FEB0

Port 1 data register

P1DR

R/W

H'00

H'FF60

Port 1 register

PORT1

Undefined

H'FF50

Note:

Lower 16 bits of the address.

Port 1 Data Direction Register (P1DDR)

P17DDR

P16DDR

P15DDR

P14DDR

P13DDR

P10DDR

P12DDR

P11DDR

Bit

Initial value

R/W

P1DDR is an 8-bit write-only register, the individual bits of which specify input or output for the

pins of port 1. P1DDR cannot be read; if it is, an undefined value will be read.

This register is a write-only register, and cannot be written by bit manipulation instruction. For

details, see section 2.10.4, Access Methods for Registers with Write-Only Bits.

P1DDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its

prior state after a manual reset, and in software standby mode. As the TPU is initialized by a

manual reset, the pin states are determined by the P1DDR and P1DR specifications.

Whether the address output pins maintain their output state or go to the high-impedance state in a

transition to software standby mode is selected by the OPE bit in SBYCR.

• Modes 1 to 3 and 7

The corresponding port 1 pins are output ports when P1DDR is set to 1, and input ports when

cleared to 0.

Note:

Modes 2, 3, and 7 cannot be used in the H8S/2240.

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