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H8S2245 датащи(PDF) 402 Page - Renesas Technology Corp |
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H8S2245 датащи(HTML) 402 Page - Renesas Technology Corp |
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402 / 818 page ![]() Section 9 16-Bit Timer Pulse Unit (TPU) Rev.3.00 Mar. 26, 2007 Page 360 of 772 REJ09B0355-0300 Contention between Overflow/Underflow and Counter Clearing If overflow/underflow and counter clearing occur simultaneously, the TCFV/TCFU flag in TSR is not set and TCNT clearing takes precedence. Figure 9.52 shows the operation timing when a TGR compare match is specified as the clearing source, and H'FFFF is set in TGR. Counter clear signal TCNT input clock φ TCNT TGF flag Prohibited TCFV flag H'FFFF H'0000 Figure 9.52 Contention between Overflow and Counter Clearing |
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