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H8S2245 датащи(PDF) 349 Page - Renesas Technology Corp

номер детали H8S2245
подробное описание детали  Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
PDF  818 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
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H8S2245 датащи(HTML) 349 Page - Renesas Technology Corp

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Section 9 16-Bit Timer Pulse Unit (TPU)
Rev.3.00 Mar. 26, 2007 Page 307 of 772
REJ09B0355-0300
9.2.4
Timer Interrupt Enable Register (TIER)
7
TTGE
0
R/W
6
—
1
—
5
—
0
—
4
TCIEV
0
R/W
3
TGIED
0
R/W
0
TGIEA
0
R/W
2
TGIEC
0
R/W
1
TGIEB
0
R/W
Bit
Initial value
R/W
:
:
:
Channel 0: TIER0
7
TTGE
0
R/W
6
—
1
—
5
TCIEU
0
R/W
4
TCIEV
0
R/W
3
—
0
—
0
TGIEA
0
R/W
2
—
0
—
1
TGIEB
0
R/W
Channel 1: TIER1
Channel 2: TIER2
Bit
Initial value
R/W
:
:
:
The TIER registers are 8-bit registers that control enabling or disabling of interrupt requests for
each channel. The TPU has three TIER registers, one for each channel. The TIER registers are
initialized to H'40 by a reset, and in hardware standby mode.
Bit 7—A/D Conversion Start Request Enable (TTGE): Enables or disables generation of A/D
conversion start requests by TGRA input capture/compare match.
Bit 7
TTGE
Description
0
A/D conversion start request generation disabled
(Initial value)
1
A/D conversion start request generation enabled
Bit 6—Reserved: Read-only bit, always read as 1.



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