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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HD6417618 датащи(PDF) 125 Page - Renesas Technology Corp |
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HD6417618 датащи(HTML) 125 Page - Renesas Technology Corp |
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125 / 646 page  Section 6 Interrupt Controller (INTC) Rev. 6.00 Jun. 12, 2007 Page 93 of 610 REJ09B0131-0600 6.3.4 Interrupt Priority Registers A to E (IPRA to IPRE) Interrupt priority registers are five 16-bit readable/writable registers that set priority levels from 0 to 15 for interrupts except NMI. For the correspondence between interrupt request sources and IPR, refer to table 6.2, Interrupt Exception Handling Vectors and Priorities. Each of the corresponding interrupt priority ranks are established by setting a value from H'0 to H'F in each of the four-bit groups 15 to 12, 11 to 8, 7 to 4 and 3 to 0. Reserved bits that are not assigned should be set H'0 (B'0000). Bit Bit Name Initial Value R/W Description 15 14 13 12 IPR15 IPR14 IPR13 IPR12 0 0 0 0 R/W R/W R/W R/W Set priority levels for the corresponding interrupt source. 0000: Priority level 0 (lowest) 0001: Priority level 1 0010: Priority level 2 0011: Priority level 3 0100: Priority level 4 0101: Priority level 5 0110: Priority level 6 0111: Priority level 7 1000: Priority level 8 1001: Priority level 9 1010: Priority level 10 1011: Priority level 11 1100: Priority level 12 1101: Priority level 13 1110: Priority level 14 1111: Priority level 15 (highest) |
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