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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HD6417618 датащи(PDF) 53 Page - Renesas Technology Corp |
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HD6417618 датащи(HTML) 53 Page - Renesas Technology Corp |
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53 / 646 page  Section 2 CPU Rev. 6.00 Jun. 12, 2007 Page 21 of 610 REJ09B0131-0600 2.2.1 General Registers (Rn) There are sixteen 32-bit general registers (Rn), designated R0 to R15. The general registers are used for data processing and address calculation. R0 is also used as an index register. With a number of instructions, R0 is the only register that can be used. R15 is used as a hardware stack pointer (SP). In exception handling, R15 is used for accessing the stack to save or restore the status register (SR) and program counter (PC) values. 2.2.2 Control Registers There are three 32-bit control registers, designated status register (SR), global base register (GBR), and vector base register (VBR). SR indicates a processing state. GBR is used as a base address in GBR indirect addressing mode for data transfer of on-chip peripheral module registers. VBR is used as a base address of the exception handling (including interrupts) vector table. • Status register (SR) Bit Bit name Default Read/ Write Description 31 to 10 All 0 R/W Reserved These bits are always read as 0. The write value should always be 0. 9 M Undefined R/W Used by the DIV0U, DIV0S, and DIV1 instructions. 8 Q Undefined R/W Used by the DIV0U, DIV0S, and DIV1 instructions. 7 6 5 4 I3 I2 I1 I0 1 1 1 1 R/W R/W R/W R/W Interrupt Mask 3, 2 All 0 R/W Reserved These bits are always read as 0. The write value should always be 0. 1 S Undefined R/W S Used by the multiply and accumulate instruction. |
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