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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HD6417618 датащи(PDF) 427 Page - Renesas Technology Corp |
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HD6417618 датащи(HTML) 427 Page - Renesas Technology Corp |
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427 / 646 page  Section 15 Host Interface (HIF) Rev. 6.00 Jun. 12, 2007 Page 395 of 610 REJ09B0131-0600 15.4 Register Descriptions The HIF has the following registers. • HIF index register (HIFIDX) • HIF general status register (HIFGSR) • HIF status/control register (HIFSCR) • HIF memory control register (HIFMCR) • HIF internal interrupt control register (HIFIICR) • HIF external interrupt control register (HIFEICR) • HIF address register (HIFADR) • HIF data register (HIFDATA) • HIF boot control register (HIFBCR) • HIFDREQ trigger register (HIFDTR) • HIF bank interrupt control register (HIFBICR) 15.4.1 HIF Index Register (HIFIDX) HIFIDX is a 32-bit register used to specify the register read from or written to by an external device when the HIFRS pin is held low. HIFIDX can be only read by the on-chip CPU. HIFIDX can be only written to by an external device while the HIFRS pin is driven high. Bit Bit Name Initial Value R/W Description 31 to 8 — All 0 R Reserved These bits are always read as 0. The write value should always be 0. |
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