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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HD6417618 датащи(PDF) 388 Page - Renesas Technology Corp |
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HD6417618 датащи(HTML) 388 Page - Renesas Technology Corp |
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388 / 646 page  Section 14 Serial Communication Interface with FIFO (SCIF) Rev. 6.00 Jun. 12, 2007 Page 356 of 610 REJ09B0131-0600 14.3.10 FIFO Data Count Register (SCFDR) SCFDR is a 16-bit register which indicates the number of data stored in the transmit FIFO data register (SCFTDR) and the receive FIFO data register (SCFRDR). It indicates the number of transmit data in SCFTDR with the upper eight bits, and the number of receive data in SCFRDR with the lower eight bits. SCFDR can always be read from by the CPU. SCFDR is initialized to H'0000 by a power on reset. Bit Bit Name Initial value R/W Description 15 to 13 All 0 R Reserved These bits are always read as 0. The write value should always be 0. 12 11 10 9 8 T4 T3 T2 T1 T0 0 0 0 0 0 R R R R R Indicate the number of non-transmitted data stored in SCFTDR. H'00 means no transmit data, and H'10 means that SCFTDR is full of transmit data. 7 to 5 All 0 R Reserved These bits are always read as 0. The write value should always be 0. 4 3 2 1 0 R4 R3 R2 R1 R0 0 0 0 0 0 R R R R R Indicate the number of receive data stored in SCFRDR. H'00 means no receive data, and H'10 means that SCFRDR full of receive data. |
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