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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HD6417618 датащи(PDF) 355 Page - Renesas Technology Corp |
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HD6417618 датащи(HTML) 355 Page - Renesas Technology Corp |
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355 / 646 page  Section 13 Compare Match Timer (CMT) Rev. 6.00 Jun. 12, 2007 Page 323 of 610 REJ09B0131-0600 13.5.3 Conflict between Byte-Write and Count-Up Processes of CMCNT Even when the count-up occurs in the T2 cycle while writing to CMCNT in bytes, the byte-writing has priority over the count-up. In this case, the count-up is not performed. The byte data on another side, which is not written to, is also not counted and the previous contents remain. Figure 13.7 shows the timing when the count-up occurs in the T2 cycle while writing to CMCNT in bytes. M XX CMCNTH CMCNT count-up enable CMCNTH CMCNTL Peripheral operating clock (P φ) Address Internal write T1 T2 N CMCSR write cycle Figure 13.7 Conflict between Byte-Write and Count-Up Processes of CMCNT 13.5.4 Conflict between Write Processes to CMCNT with the Counting Stopped and CMCOR Writing the same value to CMCNT with the counting stopped and CMCOR is prohibited. If written, the CMF flag in CMCSR is set to 1 and CMCNT is cleared to H'0000. |
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