HD6417618 datasheet(343/646 Pages) RENESAS

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Section 12 Ethernet Controller Direct Memory Access Controller (E-DMAC)

Rev. 6.00 Jun. 12, 2007 Page 311 of 610

REJ09B0131-0600

(3)

Countermeasure for the case of TC interrupt-driven software

The sample countermeasure for the case of TC interrupt-driven software shown below is the

addition of timeout processing within the limit imposed by the maximum specified time. This is

based on the method explained in (b) Countermeasure by adding timeout processing in section

12.4.1, Usage Notes on SH-Ether EtherC/E-DMAC Status Register (EESR).

The maximum specified time should be set with reference to the maximum times in consideration

of retry processing (table 12.2). From this maximum specified time, determine n, the number of

calls of the OS service routine with a timeout function.

(b) Countermeasure as the addition of timeout processing within the limit imposed by the

maximum specified time

1. Prepare multiple transmit descriptors so that multiple frames can be transmitted.

2. After setting the transmit descriptors, start transmission by setting bit 0 (TR) in the E-DMAC

transmit request register (EDTRR).

3. Before setting the next frame for transmission in the transmit descriptor (when a transmission

task arises), check the TACT bit in the transmit descriptor.

4. If the TACT bit is clear, set the frame for transmission in the corresponding transmit descriptor

and start transmission by setting the TR bit in EDTRR. If the TACT bit is set to 1, set counter i

to 0 (counter i is the variable that indicates the number of calls of the OS service routine with a

timeout function). Then, place the transmission task in a waiting state by calling the OS routine

(e.g. acquire a semaphore that has a timeout limit).

Note:

Before setting the TR bit in EDTRR, always read the TR bit and make sure that TR = 0.

5. When the transmission task has left the waiting state and entered the execution state within the

specified constant period, set the frame for transmission in the corresponding transmit

descriptor and then set the TR bit in EDTRR to start transmission. The transmission task

should be taken out of the waiting state by the interrupt handler initiated by generation of the

TC interrupt.

6. If the transmission task has not left the waiting state within the specified constant period,

increment counter i. Then, if i < n, check the TACT bit in the corresponding transmit

descriptor. The value for counting, n, is determined by the user with reference to table 12.2.

7. If the TACT bit is clear, set the frame for transmission in the corresponding transmit descriptor

and set the TR bit in EDTRR to start transmission. If the TACT bit is set to 1, return the

transmission task to the waiting state by calling an OS service routine that has a timeout

function, and then repeat steps 5 and 6.

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