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HD404339FS датащи(PDF) 23 Page - Renesas Technology Corp |
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HD404339FS датащи(HTML) 23 Page - Renesas Technology Corp |
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23 / 80 page ![]() HD404339 Series 21 In stop mode, the system oscillator is stopped. To ensure a proper oscillation stabilization period of at least t RC when clearing stop mode, execute the cancellation according to the timing chart in figure 12. In watch and subactive modes, a timer A or INT 0 interrupt can be accepted during the interrupt frame period T (see figure 13). Note: In watch and subactive modes, an interrupt will not be properly detected if the INT 0 high or low level period is shorter than the interrupt frame period T. Thus, when operating in watch and subactive modes, maintain the INT 0 high or low level period longer than period T to ensure interrupt detection. , , , , Stop mode Oscillator Internal clock STOP instruction execution tres ≥ tRC (stabilization period) tres RESET or STOPC Figure 12 Timing of Stop Mode Cancellation Active mode Interrupt strobe Watch mode Oscillation stabilization period Active mode T t RC T: t : RC Interrupt frame length Oscillation stabilization period INT0 Interrupt request generation (During the transition from watch mode to active mode only) Tx T T + tRC ≤ TX ≤ 2T + tRC Figure 13 Interrupt Frame |
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