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M306V2EEFS датащи(PDF) 233 Page - Renesas Technology Corp |
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M306V2EEFS датащи(HTML) 233 Page - Renesas Technology Corp |
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233 / 271 page ![]() Rev.1.40 Oct 06, 2004 page 233 of 269 M306V2ME-XXXFP, M306V2EEFP 2.17.3 Pull-up Control Registers Figures 2.17.15 to 2.17.17 show the pull-up control registers. The pull-up control register can be set to apply a pull-up resistance to each block of 4 ports. When ports are set to have a pull-up resistance, the pull-up resistance is connected only when the direction register is set for input. However, in memory expansion mode and microprocessor mode, pull-up control register of P0 to P5 is invalid. 2.17.4 Port Control Register Figure 2.17.14 shows the port control register. The bit 0 of port control register is used to read port P1 as follows: 0: When port P1 is input port, port input level is read. When port P1 is output port, the contents of port P1 register is read. 1: The contents of port P1 register is read through port P1 is input/output port. This register is valid in the following : • External bus width is 8 bits in microprocessor mode or memory expansion mode. • Port P1 can be used as a port in multiplexed bus for the entire space. |
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