6V7 datasheet(7/298 Pages) RENESAS

7 / 298 page

Rev.1.00

May 18, 2004

page 7 of 296

M306V7MG/MH/MJ/MJA-XXXFP, M306V7FG/FH/FJ/FJAFP

Table 1.5.3 Pin description (1)

VCCE, VCCI,

VSS

CNVSS

XIN

XOUT

BYTE

P00 to P07

Signal name

Power supply

input

CNVSS

Reset input

Clock input

Clock output

External data

bus width

select input

I/O port P0

Supply 4.75V to 5.25V to the VCCE pin. Supply 3.15V to 3.45V to the

VCCI pin. Supply 0V to the VSS pin.

Function

This pin switches between processor modes. Connect it to the

VSS pin when operating in single-chip or memory expansion mode.

Connect it to the VCCI pin when in microprocessor mode.

A “L” on this input resets the microcomputer.

These pins are provided for the main clock generating circuit.Connect

a ceramic resonator or crystal between the XIN and the XOUT pins. To

use an externally derived clock, input it to the XIN pin and leave the

XOUT pin open.

This pin selects the width of an external data bus. A 16-bit width is

selected when this input is “L”; an 8-bit width is selected when this

input is “H”. This input must be fixed to either “H” or “L.” When

operating in single-chip mode,connect this pin to VSS.

This is an 8-bit CMOS I/O port. It has an input/output port direction

individually. When set for input in single-chip mode, the user can specify

in units of four bits via software whether or not they are tied to a pull-up

resistor. In memory expansion and microprocessor modes, the user

cannot specify that.

Pin name

Input

Output

Input

Input/output

I/O type

D0 to D7

P10 to P17

I/O port P1

These pins input and output data (D –D ).

This is an 8-bit I/O port equivalent to P0.

Input/output

D8 to D15

P20 to P27

A0 to A7

P30 to P37

A8 to A15

P40 to P47

I/O port P2

I/O port P3

I/O port P4

These pins input and output data (D8–D15).

This is an 8-bit I/O port equivalent to P0.

These pins output 8 low-order address bits (A0–A7).

This is an 8-bit I/O port equivalent to P0.

These pins output 8 middle-order address bits (A8–A15).

This is an 8-bit I/O port equivalent to P0.

Input/output

Output

Input/output

Output

Input/output

Output

CS0 to CS3,

A16 to A19

These pins output CS0–CS3 signals and A16–A19. CS0–CS3 are chip

select signals used to specify an access space. A16–A19 are 4 high-

order address bits.

RESET

I/O port P5

P50 to P57

This is an 8-bit I/O port equivalent to P0. In single-chip mode, P57 in

this port outputs a divide-by-8 or divide-by-32 clock of XIN or a clock of

the same frequency as XCIN as selected by software.

Output

Input

Output

Input

WRL / WR,

WRH / BHE,

RD,

BCLK,

HLDA,

HOLD,

ALE,

RDY

Output WRL, WRH (WR and BHE), RD, BCLK, HLDA, and ALE

signals. WRL and WRH, and BHE and WR can be switched using

software control.

s WRL, WRH, and RD selected

With a 16-bit external data bus, data is written to even addresses

when the WRL signal is “L” and to the odd addresses when the WRH

signal is “L”. Data is read when RD is “L”.

s WR, BHE, and RD selected

Data is written when WR is “L”. Data is read when RD is “L”. Odd

addresses are accessed when BHE is “L”. Use this mode when using

an 8-bit external data bus.

While the input level at the HOLD pin is “L”, the microcomputer is

placed in the hold state. While in the hold state, HLDA outputs a “L”

level. While the input level of the RDY pin is “L”, the microcomputer is in

the ready state. ALE output is indefinite.

Input/output

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