STW4811MBRASLASHLF datasheet(29/86 Pages) STMICROELECTRONICS

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Functional description

STw4811M/STw4811N

28/85

USB interrupt enable low register

USB interrupt enable low register enables interrupts on transition from high to low.

USB interrupt enable high register

USB interrupt enable high register enables interrupts on transition from low to high.

Interrupts

Table 13 indicates the signals that can generate interrupts. Any of the signals given in

Table 13 can generate an interrupt when the signal becomes either low or high. After an

interrupt, the OTG controller is able to read each signal status as well as the bit that

indicates whether or not that signal generated the interrupt.

A bit in the

interrupt latch register is set when any of the following occurs:

●

writing “1” to its set address causes the corresponding bit to be set.

●

the corresponding bit in the

interrupt enable high register is set, and the associated

signal changes from low to high

●

the corresponding bit in the

interrupt enable low register is set, and the associated

signal changes from high to low

The

interrupt latch register is cleared by writing “1” to its clear address.

Table 15.

USB interrupt enable low register (address = 0Ch and 0Dh)

5432

cr_int

bdis_acon

id_float

dn_hi

id_gnd_

forced

dp_hi

sess_vld

vbus_

vld

0000

R/W

Table 16.

USB interrupt enable high register (address = 0Eh and 0Fh)

765

432

cr_int

bdis_acon

id_float

dn_hi

id_gnd_

forced

dp_hi

sess_vld vbus_vld

R/W

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