SABRE-LL-I datasheet(80/141 Pages) STMICROELECTRONICS

80 / 141 page

Current DAC circuit

SABRE-LL-I

80/141

Current DAC circuit

16.1

Overview

S.A.B.Re includes a multiple range 6-bit current sink DAC. The LSB value of this DAC can

be selected using the DacRange[1:0] bits in the CurrDacCtrl register.

The output of this circuit is connected to GPIO[8] that is a 5V tolerant pin. The value of this

pin can be converted using ADC. The pin value can be scaled before being converted by

enabling the internal resistor divider connected to this pin. If the current sunk by resistor

divider is not acceptable the pin voltage can be converted without scaling its value. When

the conversion without scaling resistor is chosen a clamping connection is used to avoid

voltage compatibility of the pin to the ADC system. The clamping circuit will sink a typical

current of half microampere from the pin during the sampling time.

Figure 23.

Current DAC block diagram

The circuit is enabled by setting to logic ‘1’ the EnDac bit in the CurrDacCtrl register then the

desired sunk current value is chosen by changing the value of the DacValue[5:0] bits in the

Current Sink

DAC

DacValue[5:0]

EnDac

A2DChannel1[4:0]

A2DChannel2[4:0]

Combinatorial

Mask

Combinatorial

Mask

Address

Recognized

Address

Recognized

EnDac

Clamp circuit

Gpio8 Clamp

(to ADC)

EnDacScale

DacRange[1:0]

Reference Current

Generator

Va3

Gpio[8]

DacRange[1:0]

Gpio[8] Digital Driver

RCurrDac

SABRE-LL-I датащи(PDF) 80 Page - STMicroelectronics

SABRE-LL-I датащи(HTML) 80 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL