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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST10R272L датащи(PDF) 14 Page - STMicroelectronics |
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ST10R272L датащи(HTML) 14 Page - STMicroelectronics |
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14 / 77 page  14/77 ST10R272L - MULTIPLY-ACCUMULATE UNIT (MAC) 5 MULTIPLY-ACCUMULATE UNIT (MAC) The MAC is a specialized co-processor added to the ST10R272L CPU core to improve the performance of signal processing algorithms. It includes: • a multiply-accumulate unit • an address generation unit, able to feed the mac unit with 2 operands per cycle • a repeat unit, to execute a series of multiply-accumulate instructions New addressing capabilities enable the CPU to supply the MAC with up to 2 operands per instruction cycle. MAC instructions: multiply, multiply-accumulate, 32-bit signed arithmetic operations and the CoMOV transfer instruction have been added to the standard instruction set. Full details are provided in the ‘ST10 Family Programming Manual’. Figure 5 MAC architecture MAC CoProcessor dual-port internal RAM external memory memory program new addressing features IDX0 IDX1 QX0 QX1 QR0 QR1 operands control program code data buses 16 x16 multiplier 40-bit ALU shifter MCW MAL MRW MAH MSW repeat unit 40-bit accumulator Peripheral interface ST10R272L CPU 1 |
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