HT46R46 datasheet(20/77 Pages) HOLTEK

20 / 77 page

HT46R46/C46/R47/C47/R48A/C48A/R49

Rev. 1.30

June 5, 2008

I/O Pin Structures

The following diagrams illustrate the I/O pin internal

structures. As the exact logical construction of the I/O

pin may differ from these drawings, they are supplied as

a guide only to assist with the functional understanding

of the I/O pins.

Programming Considerations

Within the user program, one of the first things to con-

sider is port initialization. After a reset, all of the I/O data

and port control registers will be set high. This means

that all I/O pins will default to an input state, the level of

which depends on the other connected circuitry and

whether pull-high options have been selected. If the port

control registers, PAC, PBC, PCC and PDC, are then

programmed to setup some pins as outputs, these out-

put pins will have an initial high output value unless the

associated port data registers, PA, PB, PC and PD, are

first programmed. Selecting which pins are inputs and

which are outputs can be achieved byte-wide by loading

the correct values into the appropriate port control regis-

ter or by programming individual bits in the port control

²SET [m].i² and ²CLR [m].i² instruc-

tions. Note that when using these bit control instruc-

tions, a read-modify-write operation takes place. The

microcontroller must first read in the data on the entire

port, modify it to the required new bit values and then re-

write this data back to the output ports.

Port A has the additional capability of providing wake-up

functions. When the device is in the Power Down Mode,

various methods are available to wake the device up.

One of these is a high to low transition of any of the Port

A pins. Single or multiple pins on Port A can be setup to

have this function.

Note that some devices have different package types

which may result in some I/O pins not being bonded out.

If these pins are setup as inputs they may oscillate and

increase power consumption, especially notable if the

device is in the Power Down Mode. It is therefore recom-

mended that any unbonded pins should be setup as out-

puts, or if setup as inputs, then they should be

connected to pull-high resistors.

Timer/Event Counters

The provision of timers form an important part of any

microcontroller giving the designer a means of carrying

out time related functions. Each device contains an in-

ternal 8-bit count-up timer. With three operating modes,

the timers can be configured to operate as a general

timer, external event counter or as a pulse width mea-

surement device. The provision of an internal 8-stage

prescaler to the timer clock circuitry gives added range

to the timer.

There are two registers related to the Timer/Event

Counter, TMR and TMRC. The TMR register is the reg-

ister that contains the actual timing value. Writing to

TMR places an initial starting value in the Timer/Event

Counter preload register while reading TMR retrieves

the contents of the Timer/Event Counter. The TMRC

defines the timer options, and determines how the timer

is to be used. The timer clock source can be configured

to come from the internal system clock source or from

an external clock on shared pin PA4/TMR.

Configuring the Timer/Event Counter Input Clock

Source

The internal timer

¢s clock source can originate from ei-

ther the system clock or from an external clock source.

The system clock input timer source is used when the

timer is in the timer mode or in the pulse width measure-

ment mode. The internal timer clock also passes

through a prescaler, the value of which is conditioned by

the bits PSC0, PSC1 and PSC2.

An external clock source is used when the timer is in the

event counting mode, the clock source being provided

on pin-shared pin PA4/TMR. Depending upon the condi-

tion of the TE bit, each high to low, or low to high transi-

tion on the PA4/TMR pin will increment the counter by

one.

T 1

T 2

T 3

T 4

T 1

T 2

T 3

T 4

W r i t e t o P o r t

R e a d f r o m P o r t

S y s t e m C l o c k

P o r t D a t a

Read/Write Timing

P A 4 / T M R I n p u t

T E

T i m e r / E v e n t C o u n t e r

M o d e C o n t r o l

T O N

P r e l o a d R e g i s t e r

T i m e r / E v e n t C o u n t e r

D a t a B u s

R e l o a d

O v e r f l o w

t o I n t e r r u p t

8 - S t a g e P r e s c a l e r

P S C 2 ~ P S C 0

( 1 / 1 ~ 1 / 1 2 8 )

8 - B i t T i m e r / E v e n t C o u n t e r

T M 1 T M 0

f S Y S

P F D

8-bit Timer/Event Counter Structure

HT46R46 датащи(PDF) 20 Page - Holtek Semiconductor Inc

HT46R46 датащи(HTML) 20 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77

датащи скачать

ссылки URL