HT46R46 datasheet(12/77 Pages) HOLTEK

12 / 77 page

HT46R46/C46/R47/C47/R48A/C48A/R49

Rev. 1.30

June 5, 2008

tempreg1 db

; temporary register #1

tempreg2 db

; temporary register #2

mov

a,06h

; initialise table pointer - note that this address

; is referenced

mov

tblp,a

; to the last page or present page

tabrdl

tempreg1

; transfers value in table referenced by table pointer

; to tempregl

; data at prog. memory address

²706H² transferred to

; tempreg1 and TBLH

dec

tblp

; reduce value of table pointer by one

tabrdl

tempreg2

; transfers value in table referenced by table pointer

; to tempreg2

; data at prog.memory address

²705H² transferred to

; tempreg2 and TBLH

; in this example the data

²1AH² is transferred to

; tempreg1 and data

²0FH² to register tempreg2

; the value

²00H² will be transferred to the high byte

; register TBLH

org

700h

; sets initial address of last page (for HT46R47)

00Ah, 00Bh, 00Ch, 00Dh, 00Eh, 00Fh, 01Ah, 01Bh

Because the TBLH register is a read-only register and

cannot be restored, care should be taken to ensure its

protection if both the main routine and Interrupt Service

Routine use table read instructions. If using the table

read instructions, the Interrupt Service Routines may

change the value of the TBLH and subsequently cause

errors if used again by the main routine. As a rule it is

recommended that simultaneous use of the table read

instructions should be avoided. However, in situations

where simultaneous use cannot be avoided, the inter-

rupts should be disabled prior to the execution of any

main routine table-read instructions. Note that all table

related instructions require two instruction cycles to

complete their operation.

Data Memory

The Data Memory is a volatile area of 8-bit wide RAM

internal memory and is the location where temporary in-

formation is stored. Divided into two sections, the first of

these is an area of RAM where special function registers

are located. These registers have fixed locations and

are necessary for correct operation of the device. Many

of these registers can be read from and written to di-

rectly under program control, however, some remain

protected from user manipulation. The second area of

Data Memory is reserved for general purpose use. All

locations within this area are read and write accessible

under program control.

Instruction

Table Location Bits

b11

b10

TABRDC [m] PC11

PC10

PC9

PC8

TABRDL [m]

1111

Table Location

Note:

PC11~PC8: Current Program Counter bits

@7~@0: Table Pointer TBLP bits

For the HT46R49 the Table address location is 12 bits, i.e. from b11~b0.

For the HT46R47 and HT46R48A, the Table address location is 11 bits, i.e. from b10~b0.

For the HT46R46, the Table address location is 10 bits, i.e. from b9~b0.

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