поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

R5F10CMDCLFB датащи(PDF) 79 Page - Renesas Technology Corp

номер детали R5F10CMDCLFB
подробное описание детали  RENESAS MCU
PDF  139 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F10CMDCLFB датащи(HTML) 79 Page - Renesas Technology Corp

Back Button R5F10CMDCLFB Datasheet HTML 75Page - Renesas Technology Corp R5F10CMDCLFB Datasheet HTML 76Page - Renesas Technology Corp R5F10CMDCLFB Datasheet HTML 77Page - Renesas Technology Corp R5F10CMDCLFB Datasheet HTML 78Page - Renesas Technology Corp R5F10CMDCLFB Datasheet HTML 79Page - Renesas Technology Corp R5F10CMDCLFB Datasheet HTML 80Page - Renesas Technology Corp R5F10CMDCLFB Datasheet HTML 81Page - Renesas Technology Corp R5F10CMDCLFB Datasheet HTML 82Page - Renesas Technology Corp R5F10CMDCLFB Datasheet HTML 83Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 79 / 139 page
background image
RL78/D1A
3. ELECTRICAL SPECIFICATIONS (J GRADE PRODUCT)
R01DS0463EJ0120 Rev. 1.20
Page 79 of 135
Mar 31, 2026
3.5.7 Serial interface: LIN-UART (UARTF) operation
TA = -40 to +85
°C
2.7 V
≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V
Item
Symbols
Conditions
Min.
Max.
Unit
Transfer rate
T
1.0
Mbps
Caution Different voltage between EVDD and VDD is allowed only when LCDM register is initial value.
3.5.8 Serial interface: CAN operation
TA = -40 to +85
°C,
2.7 V
≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V
Items
Symbols
Conditions
Min.
Max.
Unit
Transfer rate
T
1.0
Mbps
Internal delay time
tNODE
100
ns
CRxD minimum pulse width
for wake up
tCRXW
Necessary
width to detect
wakeup signal
200
ns
Caution Different voltage between EVDD and VDD is allowed only when LCDM register is initial value.
Figure 3-13. Internal delay time of CAN
CAN Internal clock Note
CTxD pin
(Transfer data)
CRxD pin
(Receive data)
tOUTPUT
tINPUT
Internal delay time (tNODE) = Internal Transfer Delay (toutput) + Internal Receive Delay (tInput)
Note CAN Internal clock (fCAN): CAN baud rate clock
CAN
macro
RL78/D1A
Internal Transfer Delay
Internal Receive Delay
CTxD pin
CRxD pin
Image figure of Internal delay



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com