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TDA7500A датащи(PDF) 27 Page - STMicroelectronics |
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TDA7500A датащи(HTML) 27 Page - STMicroelectronics |
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27 / 40 page ![]() 27/40 TDA7500A SAMPLE RATE CONVERTER Fsin/Fsout = 1 (44.1KHz) RDS TIMING The RDS block adhere to the timings defined by the RDS standard EN50067. More information are also available in the dedicated Appllication Note. Symbol Parameter Test Condition Min. Typ. Max. Unit THD+N Total Harmonic Distortion + Noise 20Hz to 20kHz, Full Scale, 16 bit inp. -98 dB 20Hz to 20kHz, Full Scale, 20 bit inp. -101 dB 1 kHz Full Scale, 16 bit inp. -98 dB 10 kHz Full Scale, 16 bit inp. -98 dB 1 kHz Full Scale, 20 bit inp. -109 dB 10 kHz Full Scale, 20 bit inp -102 dB DR Dynamic Range 1 kHz -60 dB - 16 bit inp.,A-Weighted 98 dB 1 kHz -60 dB - 20 bit inp.,A-Weighted 120 dB IPD Interchannel Phase Deviation 0 Degree fc Cutoff Frequency @ -3 dB 20 Hz Rp Pass Band Ripple from 0 to 20kHz -0.05 +0.05 dB Rs Stopband Attenuation @24.1kHz -105 dB Tg Group Delay Fsout = 44.1 kHz 612 µs Fratio Fsin / Fsout 0.7 1.05 Symbol Parameter Test Condition Min. Typ. Max. Unit Fcrystal Crystal Frequency First mode - 8.55 - MHz Second mode - 8.664 - MHz tbclk RDS SPI Bit Clock (TDSP is the period of the dsp core) 3TDSP -- ns tdis SPI Disable time between 2 transfers 3TDSP -- ns |
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