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AT25DF512C датащи(PDF) 9 Page - Renesas Technology Corp

номер детали AT25DF512C
подробное описание детали  512-Kbit, 1.65 V Minimum SPI Serial Flash Memory with Dual-Read Support
PDF  47 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

AT25DF512C датащи(HTML) 9 Page - Renesas Technology Corp

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DS-AT25DF512C-030 Rev.H
Page 9
2024-01-08
© 2024 Renesas Electronics
AT25DF512C Datasheet
3.
Block Diagram
Figure 4. AT25DF512C Block Diagram
4.
Memory Array
To provide the greatest flexibility, the memory array of the AT25DF512C can be erased in three levels of
granularity, including a full-chip erase. The size of the erase blocks is optimized for both code and data storage
applications, allowing both code and data segments to reside in their own erase regions. Figure 5 shows each
erase level.
Figure 5. Memory Architecture Diagram
32 kB
4 kB
1-256 Byte
Block Erase
Block Erase
Page Program
(52h Command)
(20h Command)
(02h Command)
4 kB
00F000h – 00FFFFh
256 Bytes
00FF00h – 00FFFFh
4 kB
00E000h – 00EFFFh
256 Bytes
00FE00h – 00FEFFh
4 kB
00D000h – 00DFFFh
256 Bytes
00FD00h – 00FDFFh
4 kB
00C000h – 00CFFFh
256 Bytes
00FC00h – 00FCFFh
4 kB
00B000h – 00BFFFh
256 Bytes
00FB00h – 00FBFFh
4 kB
00A000h – 00AFFFh
256 Bytes
00FA00h – 00FAFFh
4 kB
009000h – 009FFFh
256 Bytes
00F900h – 00F9FFh
4 kB
008000h – 008FFFh
Block Erase Detail
Page Program Detail
Page Address
Block Address
Range
Range
32 kB
4 kB
4 kB
4 kB
4 kB
4 kB
4 kB
4 kB
4 kB
32 kB
007000h – 007FFFh
006000h – 006FFFh
256 Bytes
000600h – 0006FFh
005000h – 005FFFh
256 Bytes
000500h – 0005FFh
004000h – 004FFFh
256 Bytes
000400h – 0004FFh
003000h – 003FFFh
256 Bytes
000300h – 0003FFh
002000h – 002FFFh
256 Bytes
000200h – 0002FFh
001000h – 001FFFh
256 Bytes
000100h – 0001FFh
000000h – 000FFFh
256 Bytes
000000h – 0000FFh



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