IP113F
Preliminary Data Sheet
Extended MII registers and EEPROM registers (continued)
MII
ROM
NAME
R/W
DESCRIPTION
DEFAULT
Interrupt register (17D)
17.0
--
intr_link
RO
RC
Link status change
It is logic “1” when link status changes on TP
port and it will active interrupt pin. It is
self-clear after reading the register.
1: Interrupt occur 0: nothing happen
0
17.1
--
intr_duplex
RO
RC
Duplex mode change
1: Interrupt occur 0: nothing happen
0
17.2
--
intr_speed
RO
RC
Speed mode change
1: Interrupt occur 0: nothing happen
0
17.3
--
intr_mf_rx_indicate
RO
RC
Maintenance frame receive indication
1: Interrupt occur 0: nothing happen
0
17.4
--
intr_cnt_overflow
RO
RC
Statistic counter overflow
1: Interrupt occur 0: nothing happen
0
17.5
--
intr_status
RO
RC
Interrupt status
1: Interrupt occur 0: nothing happen
It is logic “OR” of 17.0~17.4.
0
17.6
--
Intr_pwabn
RO
RC
Interrupt status
1: remote link partner power abnormal
0: nothing happen
0
17.7
--
Intr_pwabn_en
RW
Remote LP power abnormal interrupt enable
1: not mask interrupt
0: mask interrupt
0
17.8
--
intr_link_mask
RW
Mask TP port link change Interrupt
1: mask, 0: not mask (default)
1
17.9
--
intr_duplex_mask
RW
Mask TP port duplex mode change Interrupt
1: mask interrupt (default), 0: not mask
1
17.10
--
intr_speed_mask
RW
Mask TP port speed mode change Interrupt
1: mask interrupt (default), 0: not mask
1
17.11
--
intr_mf_rx_indc
_mask
RW
Mask maintenance frame receive indication
Interrupt
1: mask interrupt (default), 0: not mask
1
17.12
--
intr_cnt_ov_mask
RW
Mask Statistic counter overflow Interrupt
1: mask interrupt (default), 0: not mask
1
17.13
--
intr_all_mask
RW
Mask all Interrupt
1: mask interrupt (default), 0: not mask
1
17[15:14]
--
Reserved
RW
0
Confidential.
35/46
Aug. 20, 2003
Copyright © 2003, IC Plus Corp.
IP113F-DS-R02
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