CY28316

Rev 1.0, November 20, 2006

Page 7 of 17

Byte 7: Control Register 7

Bit

Pin#

Name

Default

Pin Description

Bit 7

–

Reserved

0

Reserved.

Bit 6

25

24_48MHz_DRV

1

0 = Norm, 1 = High Drive.

Bit 5

26

48MHz_DRV

1

0 = Norm, 1 = High Drive.

Bit 4

–

Reserved

0

Reserved.

Bit 3

–

Reserved

0

Reserved.

Bit 2

–

Reserved

0

Reserved.

Bit 1

–

Reserved

0

Reserved.

Bit 0

–

Reserved

0

Reserved.

Byte 8: Vendor ID and Revision ID Register (Read Only)

Bit

Name

Default

Pin Description

Bit 7

Revision_ID3

0

Revision ID bit[3].

Bit 6

Revision_ID2

0

Revision ID bit[2].

Bit 5

Revision_ID1

0

Revision ID bit[1].

Bit 4

Revision_ID0

0

Revision ID bit[0].

Bit 3

Vendor_ID3

1

Bit[3] of Cypress’s Vendor ID. This bit is read-only.

Bit 2

Vendor_ID2

0

Bit[2] of Cypress’s Vendor ID. This bit is read-only.

Bit 1

Vendor _ID1

0

Bit[1] of Cypress’s Vendor ID. This bit is read-only.

Bit 0

Vendor _ID0

0

Bit[0] of Cypress’s Vendor ID. This bit is read-only.

Byte 9: System RESET and Watchdog Timer Register

Bit

Name

Default

Pin Description

Bit 7

SDRAM_DRV

0

SDRAM clock output drive strength.

0 = Normal.

1 = High Drive.

Bit 6

PCI_DRV

0

PCI clock output drive strength.

0 = Normal.

1 = High Drive.

Bit 5

Reserved

0

Reserved

Bit 4

RST_EN_WD

0

This bit will enable the generation of a Reset pulse when a Watchdog Timer

time-out occurs.

0 = Disabled.

1 = Enabled.

Bit 3

RST_EN_FC

0

This bit will enable the generation of a Reset pulse after a frequency change

occurs.

0 = Disabled.

1 = Enabled.

Bit 2

WD_TO_STATUS

0

Watchdog Timer Time-out Status bit.

0 = No time-out occurs (Read); Ignore (Write).

1 = Time-out occurred (Read); Clear WD_TO_STATUS (Write).

Bit 1

WD_EN

0

0 = Stop and reload Watchdog Timer. Unlock CY28316 from recovery frequency

mode.

1 = Enable Watchdog Timer. It will start counting down after a frequency change

occurs.

Note: CY28316 will generate a system Reset, reload a recovery frequency, and

lock itself into a recovery frequency mode after a Watchdog Timer time-out

occurs. Under recovery frequency mode, CY28316 will not respond to any

attempt to change output frequency via the SMBus control bytes. System

software can unlock CY28316 from its recovery frequency mode by clearing the

WD_EN bit.