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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CY28316PVC датащи(PDF) 13 Page - SpectraLinear Inc |
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CY28316PVC датащи(HTML) 13 Page - SpectraLinear Inc |
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13 / 17 page  CY28316 Rev 1.0, November 20, 2006 Page 13 of 17 Absolute Maximum Ratings[2.] Stresses greater than those listed in this table may cause permanent damage to the device. These represent a stress rating only. Operation of the device at these or any other condi- tions above those specified in the operating sections of this specification is not implied. Maximum conditions for extended periods may affect reliability. Parameter Description Rating Unit VDD, VIN Voltage on any pin with respect to GND –0.5 to +7.0 V TSTG Storage Temperature –65 to +150 °C TB Ambient Temperature under Bias –55 to +125 °C TA Operating Temperature 0 to +70 °C ESDPROT Input ESD Protection 2 (min.) kV DC Electrical Characteristics:TA = 0°C to +70°C, VDDQ3 = 3.3V ±5% [3] Parameter Description Test Condition Min. Typ. Max. Unit Supply Current IDD 3.3V Supply Current 260 mA IDD 2.5V Supply Current 25 mA Logic Inputs VIL Input Low Voltage GND – 0.3 0.8 V VIH Input High Voltage 2.0 VDD + 0.3 V IIL Input Low Current[4] –25 µA IIH Input High Current[4] 10 µA Clock Outputs VOL Output Low Voltage IOL = 1 mA 50 mV VOH Output High Voltage IOH = –1 mA 3.1 V IOL Output Low Current PCI VOL = 1.5V 70 110 135 mA REF VOL = 1.5V 50 70 100 mA 48 MHz VOL = 1.5V 50 70 100 mA 24 MHz VOL = 1.5V 50 70 100 mA SDRAM VOL = 1.5V 70 110 135 mA IOH Output High Current PCI VOH = 1.5V 70 110 135 mA REF VOH = 1.5V 50 70 100 mA 48 MHz VOH = 1.5V 50 70 100 mA 24 MHz VOH = 1.5V 50 70 100 mA SDRAM VOH = 1.5V 70 110 135 mA Crystal Oscillator VTH X1 Input Threshold Voltage[5] VDDQ3 = 3.3V 1.65 V CLOAD Load Capacitance, Imposed on External Crystal[6] 18 pF CIN,X1 X1 Input Capacitance[7] Pin X2 unconnected TBD pF Pin Capacitance/Inductance CIN Input Pin Capacitance Except X1 and X2 5 pF COUT Output Pin Capacitance 6 pF LIN Input Pin Inductance 7nH Notes: 2. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required. 3. All clock outputs loaded with 6" 60 transmission lines with 20-pF capacitors. 4. CY28316 logic inputs (except FS3) have internal pull-up devices (pull-ups not full CMOS level). Logic input FS3 has an internal pull-down device. 5. X1 input threshold voltage (typical) is VDD/2. 6. The CY28316 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. The total load placed on the crystal is 18 pF; this includes typical stray capacitance of short PCB traces to the crystal. 7. X1 input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected). |
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