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TUSB1210 датащи(PDF) 56 Page - Texas Instruments |
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TUSB1210 датащи(HTML) 56 Page - Texas Instruments |
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56 / 72 page ![]() 8.2.2.1 Design Requirements Table 8-2. Design Parameters DESIGN PARAMETER EXAMPLE VALUE VBAT 3.3 V VDDIO 1.8 V VBUS 5.0 V USB Support HS, FS, LS Clock Sources 26 MHz or 19.2 MHz Oscillator 8.2.2.2 Detailed Design Procedure Connect the TUSB1210 device as is shown in Figure 8-3. Follow the Board Guidelines in the TUSB121x USB2.0 Board Guidelines application report. 8.2.2.2.1 Unused Pins Connection • ID: Input. Leave floating if unused or TUSB1210 is Device mode only. Tie to GND through RID < 1 kΩ if Host mode. • REFCLK: Input. If REFCLK is unused, and 60 MHz clock is provided by MODEM (60 MHz should be connected to CLOCK pin in this case) then tie REFCLK to GND. • CFG: Tie to GND if REFCLK is 19.2 MHz, or tie to VDDIO if REFCLK is 26 MHz. Tie to either GND or VDDIO (does not matter which) if REFCLK not used (for example, ULPI input clock configuration). 8.2.2.3 Application Curve Figure 8-4. Full-Speed Eye Diagram TUSB1210 SLLSE09J – NOVEMBER 2009 – REVISED JULY 2021 www.ti.com 56 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TUSB1210 |
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