TLVM13640 datasheet(20/43 Pages) TI2

20 / 43 page

14 EN

RUV1

1 M

VOUT1 = 5 V

RFB1

RFB2

40.2 k

10 k

1 V

RPG

100 k

RFB3

RFB4

23.2 k

10 k

1 V

VOUT2 = 3.3 V

VIN(on) = 13.9 V

VIN(off) = 10 V

Regulator #1

Start-up based on

input voltage UVLO

Regulator #2

Sequential start-up

based on PG

PG 13

RUV2

100 k

Figure 7-4. TLVM13630 Sequencing Implementation Using PG and EN

7.3.8 Internal LDO, VCC Output, and VLDOIN Input

The TLVM13630 has an internal LDO to power internal circuitry. The VCC pin is the output of the internal LDO.

This pin must not be used to power external circuitry. Connect a high-quality, 1-μF capacitor from this pin to

AGND, close to the device pins. Do not load the VCC pin or short it to ground.

The VLDOIN pin is an optional input to the internal LDO. Connect an optional high quality 0.1-µF to 1-µF

capacitor from this pin to ground for improved noise immunity.

The LDO generates the VCC voltage from one of the two inputs: VIN or the VLDOIN input. When VLDOIN is tied

to ground or below 3.1 V, the LDO is powered from VIN. When VLDOIN is tied to a voltage higher than 3.1 V, the

LDO input is powered from VLDOIN. VLDOIN voltage must be lower than both VIN and 12.5 V.

The VLDOIN input is designed to reduce the LDO power loss. The LDO power loss is:

PLDO-LOSS = ILDO × (VIN_LDO – VVCC)

(7)

The higher the difference between the input and output voltages of the LDO, the more loss occurs to supply the

same LDO output current. The VLDOIN input provides an option to supply the LDO with a lower voltage than

VIN, to reduce the difference of the input and output voltages of the LDO and reduce power loss. For example, if

the LDO current is 10 mA at a certain frequency with VIN = 24 V and VOUT = 5 V. The LDO loss with VLDOIN tied

to ground is equal to 10 mA × (24 V – 3.3 V) = 207 mW, while the loss with VLDOIN tied to VOUT (5 V) is equal to

10 mA × (5 V – 3.3 V) = 17 mW.

The efficiency improvement is more significant at light and mid loads because the LDO loss is a higher

percentage of the total loss. The improvement is more significant with higher switching frequency because

the LDO current is higher at higher switching frequency. The improvement is more significant when VIN » VOUT

because the voltage difference is higher.

Figure 7-5 shows typical efficiency waveforms with VLDOIN powered by different input voltages.

TLVM13630

SLVSFT6B – MAY 2021 – REVISED JANUARY 2022

www.ti.com

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