THS4041, THS4042

165MHz CSTABLE HIGHSPEED AMPLIFIERS

SLOS237B− MAY 1999 − REVISED FEBRUARY 2000

20

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

APPLICATION INFORMATION

general PowerPAD design considerations (continued)

The actual thermal performance achieved with the THS404xDGN in its PowerPAD package depends on the

application. In the example above, if the size of the internal ground plane is approximately 3 inches

× 3 inches,

then the expected thermal coefficient,

θJA, is about 58.4_C/W. For comparison, the non-PowerPAD version of

the THS404x IC (SOIC) is shown. For a given

θJA, the maximum power dissipation is shown in Figure 71 and

is calculated by the following formula:

P

D +

T

MAX

–T

A

q

JA

Where:

PD

= Maximum power dissipation of THS404x IC (watts)

TMAX = Absolute maximum junction temperature (150°C)

TA

= Free-ambient air temperature (

°C)

θJA = θJC + θCA

θJC = Thermal coefficient from junction to case (°C/W)

θCA = Thermal coefficient from case to ambient air (°C/W)

DGN Package

θJA = 58.4°C/W

2 oz. Trace And Copper Pad

With Solder

DGN Package

θJA = 158°C/W

2 oz. Trace And

Copper Pad

Without Solder

SOIC Package

High-K Test PCB

θJA = 98°C/W

TJ = 150°C

SOIC Package

Low-K Test PCB

θJA = 167°C/W

2

1.5

1

0

−40

−20

0

20

40

2.5

3

MAXIMUM POWER DISSIPATION

vs

FREE-AIR TEMPERATURE

3.5

60

80

100

0.5

TA − Free-Air Temperature − °C

NOTE A: Results are with no air flow and PCB size = 3”

× 3”

Figure 71. Maximum Power Dissipation vs Free-Air Temperature

More complete details of the PowerPAD installation process and thermal management techniques can be found

in the Texas Instruments Technical Brief, PowerPAD Thermally Enhanced Package. This document can be

found at the TI web site (www.ti.com) by searching on the key word PowerPAD. The document can also be

ordered through your local TI sales office. Refer to literature number SLMA002 when ordering.