THS4041, THS4042

165MHz CSTABLE HIGHSPEED AMPLIFIERS

SLOS237B− MAY 1999 − REVISED FEBRUARY 2000

17

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

APPLICATION INFORMATION

offset voltage

The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times

the corresponding gains. The following schematic and formula can be used to calculate the output offset

voltage:

V

OO +

V

IO

1

)

R

F

R

G

" I

IB

)

R

S

1

)

R

F

R

G

" I

IB–

R

F

+

−

VI

+

RG

RS

RF

IIB−

VO

IIB+

Figure 67. Output Offset Voltage Model

optimizing unity gain response

Internal frequency compensation of the THS404x was selected to provide very wideband performance yet still

maintain stability when operated in a noninverting unity gain configuration. When amplifiers are compensated

in this manner there is usually peaking in the closed loop response and some ringing in the step response for

very fast input edges, depending upon the application. This is because a minimum phase margin is maintained

for the G=+1 configuration. For optimum settling time and minimum ringing, a feedback resistor of 200

Ω should

be used as shown in Figure 68. Additional capacitance can also be used in parallel with the feedback resistance

if even finer optimization is required.

_

+

THS404x

200

Ω

Input

Output

Figure 68. Noninverting, Unity Gain Schematic